LogicSim 2.4

LogicSim is the best and most affordable Verilog simulator for Windows.
LogicSim will offer an easy-to-use yet powerful graphical user interface that lets you quickly simulate your Verilog designs.
LogicSim is an affordable and user-friendly Verilog simulator for ASIC and FPGA design verification. It delivers a powerful and easy-to-use graphical user interface that lets you quickly simulate your Verilog designs.
LogicSim is built on our state-of-the-art single kernel simulation engine MULCORED (Multi-Core Event Distribution) technology, in one easy-to-use and totally integrated package at an affordable price.
This latest release offers a new and powerful simulation technology that simulates big designs faster. And the new Microsoft Visual Studio style workspace makes working with complex, multi-file designs a snap.
Main features:
- Verilog simulator and debugger, supporting full IEEE 1364-2001
- Verify behavioral and RTL models with functional simulation
- Verify pre/post-layout gate-level netlist with SDF back-annotation timing simulation
- Debug and trace simulation signals with user-friendly waveform viewer
- Create Verilog, SystemVerilog, VHDL, and SystemC source code with powerful HDL editor
- Export VCD waveform to third-party waveform viewers
- Fast RTL simulation speed, supporting multi-million gate designs
- Save design verification time, dramatically reduce ASIC and FPGA development time
- Easy-to-use and powerful user interface, ease verification debugging pain
- The most affordable and complete logic simulator, offering 1-year free upgrade