vhdl testbenches
FIR HDL Writer 0.9.0
EDA tool which generates FIR filters in Verilog more>> FIR HDL Writer is an EDA tool which generates FIR filters in clear text Verilog which may be synthesized to FPGAs or ASICs. Design options include multiple channels, coefficient sets, interpolation, decimation, and resource utilization specifications. The designs are fully synchronous and registered to provide maximum clock frequencies. Clock rates in excess of 300Mhz have been observed with Stratix II and Virtex IV devices (using Quartus and ISE synthesis and place and route tools) from Altera and Xilinx. Since verification has become a greater part of the work load for FPGA and ASIC developers, the FIR HDL Writer includes a self checking testbenches which performs impulse, step, and random tests. The FIR HDL Writer is the first cross platform product released by Optunis, and runs natively on Windows XP, Linux, and Mac OS X.<<less
LFSR Counter Generator 1.00
Generate Verilog or VHDL code for an LFSR counter. more>>
LFSR Counter Generator is a command-line application that generates Verilog or VHDL code for an LFSR counter of any value up to 63 bit wide. The code is written in C for Win32 platform but easily portable to other platforms.
MadEdit 0.2.8 Beta
Can edit files in Text/Column/Hex modes, and supports many useful functions, e.g. SyntaxHighlightings, WordWrap, etc more>> Can edit files in Text/Column/Hex modes, and supports many useful functions, e.g. SyntaxHighlightings, WordWrap, etc
MadEdit is an Open-Source & Cross-Platform Text/Hex Editor written in C++ and wxWidgets.
MadEdit can edit files in Text/Column/Hex modes, and supports many useful functions, e.g. SyntaxHighlightings, WordWrap, Encodings.
MadEdit is pretty small, simple and easy-to-use, yet highly-featured.
Main features:
- Edits files in Text, Column and Hex modes.
- In Hex-Mode, MadEdit can open large files which size is up to 32GB (INT_MAX*16).
- Users can change the encoding of files at runtime like Web-Browsers.
- Supports many encodings, e.g. Unicode(UTF-8, UTF-16/32 with Little or Big Endian), Big5, GBK and S-JIS etc.
- Supports Unicode CJK Ext-B.
- If users input a character that is not supported by current encoding, this character will be converted to U+XXXX. Unicode format.
- Regular Expression search & replace (by using Boost.Xpressive).
- Opens multiple files on single instance.
- Supports syntax-highlighting of many programming languages, e.g. awk, C/C++, CSS, diff/patch, DOS Batch Script, Flash ActionScript, HTML, Java, JavaScript, JSP, Lua, Pascal, PHP, Perl, Python, Ruby, UNIX Shell Script, x86 Assembly, XML, Fortran, TeX/LaTeX, Squirrel, C#, Visual Basic, ASP(VBScript).
- MadEdit can view ASCII-Art files under Win32 platform.
Enhancements:
- added Japanese Kanji supporting for converting Chinese characters.
- added the function to split window into multiple Tab Controls (by using wxAuiNotebook)
- added the function to convert between WordWraps and NewLine chars.
- added File-Type Associations Dialog under win32.
- added Search-In-Selection function when searching and replaceing.
- added Count function in SearchDialog.
- added ToHalfWidthByOptions, ToFullWidthByOptions to choose the characters(ASCII, Japanese, Korean) you want to convert.
- added ConvertSpaceToTab and ConvertTabToSpace functions.
- added new syntax files for D, SQL, Verilog and VHDL.
- fixed that cannot replace text in Hex-Mode.
- many bug-fixes and changes.
Webcpp 1.3.7
Webcpp - Web C Plus Plus - converts source code into syntax highlighted HTML. more>>
It supports Ada95, Asp, Assembler, Basic, C, C#, C++, Cg, CLIPS, Euphoria, Fortran, Haskell, Java, JavaScript, Markup, Modula2, Objective C, Pascal, Perl, PHP, Python, Renderman, Ruby, SQL, Tcl, Unix shell, & VHDL.
Webcpp uses a colour scheme system that utilizes Cascading Stylesheets.
Web C Plus Plus is a command line utility that takes your source code, and converts it into an HTML file using a fully customizable syntax highlighting engine and colour schemes.
This is useful if you want to post your code online and make it easier to read, or to make online programming tutorials.
Main features:
- Syntax highlighting
- Colour schemes loaded from a file
- Automatically generated Cascading StyleSheets
- A choice between embedded CSS or external stylesheet
- Automatic filetype detection for higlighting
- Allows to force the filetype for highlighting
- Integration with other command-line tools via input and output piping
- The ability to add the line numbers
- The ability to jump to any line number via line anchors
- The ability of hyperlinking to lines of code and external files
- Generic support for unknown text based files
Schifra 0.0.1
Schifra is a very robust, highly optimized and extremely configurable Reed-Solomon error correcting code library more>>
Main features:
- Errors and Erasures
- Supported Symbol Sizes - 2 to 32 bits
- Variable Code Block Length
- User defined primitive polynomial and finite field
- Accurate and Validated Reed-Solomon Codecs - Complete combinatorial errors and erasures unit testing
- Supported Architectures For Optimizations - x86-32, x86-64, PowerPC, m68k, XScale
- Supported Reed-Solomon Codes - Intelsat 1-4, VDL Mode 2-4, CCSDS (Basis transform), CIRC, ETS 300-421, ITU-T G.709, DVB(S and T), MPEG-2 TSP, ETS 300-429, xDSL, PostBar, MaxiCode, DataMatrix, etc
- Supported Decoding Methods - Berlekamp-Massey, Berlekamp-Welch and Sudan list decoding
- Shortened, Punctured and Concatenated Reed-Solomon Codes - WiMAX IEEE 802.16d standard
- Product Codes
- Standard and Algebraic Interleavers
- Maximum-likelihood Estimation Decoder - Beyond correcting boundry error recovery
- Optimized Encoder and Decoder - SSE1-3 and AltiVec instruction sets
- Special Optimized Decoder - For cases of 2t = 2, 4, 6, 16 and 32
- Supported Xilinx Hardware - Virtex-II, Virtex-II Pro, Spartan-3, Spartan-3E, Virtex-4
- Supported Altera Hardware - ACEX, Mercury, Stratix, Stratix GX, Cyclone
- DO-178B Level A Certified Reed-Solomon Codec - RTCA DO-224A for VDL mode 2 and 3, Certified for installation on-board airborne systems
- OpenGL Shading Language(GLSL) based Reed-Solomon Codec
- Reed-Solomon Based channel code for Erasure Channels
Notes:
- Free for non-commercial use.
- Not all the above features are available in the open source download. Features that are not available can only be obtained through the purchase of a Schifra Commercial License.
CRC Generator for Verilog or VHDL 1.0
Generate Verilog or VHDL code for parallel CRC of arbitrary data and poly width. more>>
CRC Generator for Verilog or VHDL 1.0 makes it easier for users with a command-line application which help users be able to generate Verilog or VHDL code for parallel CRC of any data width between 1 and 1024 and polynomial width between 1 and 1024, whose code is written in C for Win32, bus easily portable for other platforms.
Simple Solver 2.2.1
Simple Solver is created as an effective and convenient product which provides five separate functions: synthesis, boolean, permutation, random number, and simulation. more>>
Simple Solver 2.2.1 is created as an effective and convenient product which provides five separate functions: synthesis, boolean, permutation, random number, and simulation. These tools can be used to minimize, simplify and reduce Boolean equations and digital logic circuits. The synthesis function performs automatic design and simulation of digital logic circuits from truth table or waveform inputs for all circuit types: combinational, sequential, synchronous, and asynchronous.
The Boolean function provides minimization and truth tables for one or a series of Boolean equations. Boolean operator formats are supported for a variety of languages including ABEL, C, C++, PALASM, Verilog, VB, and VHDL. The permutation function generates ermutations of numbers for a specified number of digits and width. The random number function produces random sequences of numbers in the range of -9999 to 9999.
Enhancements:
- Includes toolbars and a support link.
a variety of languages including: ABEL, C, C++, PALASM, Verilog, VB and VHDL. Permutations The
a variety of languages including: ABEL, C, C++, PALASM, Verilog, VB and VHDL. Logic SynthesisSMASH 5.6.0
eases the practice of transient noise analysis, while leveraging model specific noise equations such as TSMC specific equations more>>
SMASH is a useful CAD utility that has many features.
Main features:
- STI stress equations for BSIM3/ BSIM4 family of models including both Berkeley and TSMC specific equations
- Enhanced DSP toolbox for periodic signal characterization with jitters measurements and histograms
- Streamlined transient noise analysis, taking into account custom equations and parameters for noise
- Batch-mode data-extraction on FFT results
- Verilog-AMS small signal analysis
- Analog operators in Verilog-AMS such as transition filters, slew integrators or circular integrators
- Enhancement of time control for Verilog timing checks and VHDL VITAL
Crimson Editor 3.70
Crimson Editor - A professional source editor for Windows more>>
Main features:
Edit multiple documents
- switch between documents using file selection tab
- pressing Ctrl+Tab brings the last accessed document to top
Syntax highlighting
- configurable via custom syntax files
- preconfigured for HTML, CSS, C/C++, Perl, Java, Delphi, Python, Matlab, LaTeX,Euphoria, PL/SQL, ASP, JSP, PHP, EDIF, VHDL, Verilog-HDL, HLA, Winbatch, OCaml, GNU-style x86 Assembly, JScript, PeopleSoft SQR, Ada 83, MIPS, and BAAN
Multi-level undo / redo
- all editing actions are recorded from the opening of a file
- unlimited undo and redo buffers
Natural word wrapping
- word wrapping does not affect syntax highlighting
- configurable wrapping indentation (easer to understand the syntax)
Spell checker
- around 40000 words were added in the dictionary
- users can register new words in their own dictionary (InstallDir/user.dic)
User tools and macros
- execute external programs with proper arguments
- compile, execute and test your code
- ease your fingers with key stroke recording (record & replay)
Directory tree view window
- click to open documents
- filter to display only selected file class
Edit remote files directly using built-in FTP client
- open, edit, and save documents in remote FTP servers
- save account information (encoded) for automatic logon
Find & Replace
- replace specified text one by one, or as a whole
Print & Print preview
- configurable page header and footer
- print with line numbers
- print with syntax highlighting (used in color printer)
- true type font selection for printer
Other useful features:
ability to detect changed files, single instance/multiple instances, bookmark & go to, highlight active line, highlight matching pairs, multi-byte support with integrated IME (for eastern languages), auto indent, wheel mouse support, copy & paste, line numbers, configurable line spacing, option to save files in Unix format, option to set working directory
Magic Do 1.0
Magic Do is a VHDL hierarchy builder that automates the process of generating ncsim/modelsim compilation macro. The same file list can also be reused for synthesis scripts and/or compilation macro for more>>
Magic Do is a VHDL hierarchy builder that automates the process of generating ncsim/modelsim compilation macro. The same file list can also be reused for synthesis scripts and/or compilation macro for any other simulator. Features 1) Automatically generates compilation macro. 2) Automatically finds and includes required packages. 3) Automatically inserts 87 and 93 option for each file. 4) Provides Alternate folder (optional). 5) Generates unused files and multiple component definition report (optional).
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